On Arm and Qualcomm GPUs, control flow re-convergence is based on the ordering of blocks within the shader program with lower instruction addresses taking priority and re-convergence happens when two groups of invocations reach the same, higher instruction address. For instance, there is an if statement at the end of a loop body where the merge for the loop continue would re-converge control flow anyway, we can elide the barriers for the if statement. On hardware with structured control flow instructions such as Intel, the loop break instruction does not always jump to the end of the loop.