So now we have 64-bit mm registers, 128-bit xmm registers, and uncountably many instructions to work with these two sets of new registers. Multiplying two vector registers in one instructions multiplies half a kibibyte (256 bytes per aggregate register). $ cargo +nightly bench --target target-riscv64-no-vector.json -Zbuild-std […] running 10 tests test bench_mul_cvec_asm_m2_segment ... bench: 2,930.20 ns/iter (+/- 29.96) test bench_mul_cvec_asm_m4_segment ... bench: 3,036.18 ns/iter (+/- 100.35) test bench_mul_cvec_asm_m4_stride ... bench: 4,713.20 ns/iter (+/- 55.09) test bench_mul_cvec_asm_m8_stride ... bench: 5,368.08 ns/iter (+/- 15.18) test bench_mul_cvec_rust ... bench: 9,957.66 ns/iter (+/- 76.39) test bench_mul_cvec_rust_v ...