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Comment on Semiconductor Test Faces Technology Shifts In The AI Era by Jaynarayan Tudu
['Jeorge Hurtarte', 'Technical Paper Link', 'Tom Katsioulas', 'Alex', 'Matt Bailey', 'Alexis R. Ware', 'Yağız Boz', 'Murugavel Ganesan', 'F. Chen', 'B.S. Deepaksubramanyan']
Comments for Semiconductor Engineering
By integrating automated test equipment (ATE) and system level test (SLT), we can support the evolving needs of AI and high-performance computing (HPC) applications in both data centers and edge devices. As products move towards high-volume manufacturing, tests can be shifted in the test process to reduce test time without sacrificing test coverage. Conversely, shifting test to the right extends test coverage later in the manufacturing process such as final test, expanding the ability to detect defects; this maintains quality levels while reducing costs with higher parallelism testing.