“The choice of process node is application-dependent, and some applications won’t move to nodes that require extreme ultraviolet (EUV) technology in the near future,” said Krishna Balachandran, senior director of product management for NVM IP in Synopsys’ Solutions Group. “Historically, for process nodes even back before 1µm and down to the 28nm node, the cost of a manufacturing process per wafer always increased per node by about 25% to 30%,” said Kevin Lucas, senior architect, applications engineering, silicon technology group at Synopsys. Given the size of process-migration barriers, it’s likely that the nodes between 12nm and 2nm node will see reduced design starts compared with older nodes.