Researchers from Google and Delft University of Technology published a technical paper titled “Innovative FA Hardware Solution to Enable System-Level Debug of 3D ICs.” Abstract Excerpt: “This paper presents a novel Failure Analysis (FA) hardware and sample preparation solution that enables System-Level FA on mobile System-on-a-Chip (SoC) PoP devices, where the DRAM is stacked atop the logic controller device. Find the technical paper here. Endrinal, Lesly, Jehan Saujauddin, YuanChung Ho, Dilbagh Singh, Sasi Sekaran Sundaresan, Vinod Kumar Kakumanu, Jessen Gonzalez, Willem D. van Driel, and G. Q. Zhang. “Innovative FA hardware solution to enable system-level debug of 3D ICs.”