None
EN
Building AI Factories With IP Solutions
['Technical Paper Link', 'Tom Katsioulas', 'Alex', 'Matt Bailey', 'Alexis R. Ware', 'Yağız Boz', 'Murugavel Ganesan', 'F. Chen', 'B.S. Deepaksubramanyan', 'Brian Bailey']
Semiconductor Engineering
Data centers have evolved—fast.
We’ve moved from traditional high-performance computing (HPC) virtualization to powering AI at scale, with GPUs and XPUs driving massive training and inference workloads.
AI factories are a different beast running huge, dedicated nodes for extended training tasks—far beyond what conventional data centers can handle.
But here’s the challenge: AI accelerators generate and consume data in ways that are nothing like HPC or general cloud workloads.
To break through bottlenecks, the industry has been introducing next-gen protocols—newer versions of memory standards, as well as interface standards such as Ultra Accelerator Link (UALink), Scale-Up Ethernet (SUE), NVLink, Ethernet for Scale-up Networking (ESUN), and Ultra Ethernet— ushering in an era of ultra-efficient computing.