The 332-layer design reaches more than 37Gb/mm² and is claimed to provide as much as 60% greater bit density than the companies’ eighth-generation NAND. Logic circuits and the NAND array are produced on different wafers, then joined through wafer-to-wafer bonding. The announcement should also be distinguished from the 1Tb TLC BiCS10 samples discussed earlier in 2026. The underlying 332-layer platform is shared, but QLC targets higher density and different workloads. Current enterprise demand may absorb the initial output, but high-density BiCS10 QLC could later enable larger consumer SSDs without proportionally increasing package count.