Researchers from University of Seoul published a technical paper titled “NAD Memory: A Hybrid Memory Device Combined with NAND Flash Memory and DRAM.” The paper proposes “a hybrid memory architecture, termed NAD, which tightly integrates DRAM and NAND flash to enable direct and parallel data transfer. By eliminating intermediate components such as I/O buffers and data buses typically used for inter-memory communication, the proposed NAD architecture significantly reduces data transfer latency.” Find the technical paper here. -H. Ahn, M. Koo and Y. Kim, “NAD Memory: A Hybrid Memory Device Combined With NAND Flash Memory and DRAM,” in IEEE Access, vol.