Let’s start with the server CPU roadmaps, with some drilldown on details with the forthcoming “Venice” Zen 6 CPUs. The Epyc 9006s have compute cores etched using 2 nanometer N2 processes from Taiwan Semiconductor Manufacturing Co and using 6 nanometer processes on the I/O dies and memory controllers that the compute dies link into. The Venice CPUs will be the first server compute engines to sport PCI-Express 6.0 peripheral slots, by the way. NEXTPLATFORM ADThe top end Venice Zen 6c version will sport 256 cores and 512 threads, which is 33 percent higher than the Turin Zen 5c. AMD is focusing on faster memory, not newer DDR6 memory that will have lower yields and higher costs initially.