In addition to the optionally available standard PWM input pins, the TB9104FTG gate driver IC features an intelligent seri al peripheral interface (SPI) for controlling the motor operation itself. Several motors can be controlled using just the SPI bus. Thus the TB9104FTG significantly streamlines system architecture, reducing wiring harness and the MCU processing load with its built-in PWM clock-generation circuits. By using the SPI, the host microcontroller (MCU) can have fewer pins and initiate motor drive with a single SPI rotation command, reducing MCU processing load and preventing communication bus congestion. A dual half-bridge mode is also supported for operating two DC motors simultaneously.